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CONTRIBUTORS.gif Source: http://upload.org/wikipedia/commons/c/cb/Serialadder.png Source: http://upload.wikimedia.org/wikibooks/en/2/2b/Register_File_Large.gif Source: http://upload.png License: Public domain Contributors: Own work Original artist: Hellisp • File:Sasha_test.svg License: CC-BY-SA-3. = V S fi to Vrr. ->25 ±1 £75 £10 VOH vol •BB HigtHevel output voltage lo - -0.4 mA Iq = 3.2 mA 2.4 vcc 0.65 V V mA mA Low-level output voltage Supply current from Vbb Iq = 2 mA 0.1 50 0.50 1 75 ice Idd Supply current from Vcc Supply current from Vqd Input capacitance (any inputs except clock and data bus) V BB = -5, f = 1MHz, unmeasured pins at Vss 25 10 45 15 mA pF Ci(ol) Clock-1 input capacitance V BB. _5 f - 1MHz, unmeasured pins at Vgs 100 150 pF Ci(02> Clock-2 input capacitance V BB. _5, f = 1MHz, unmeasured pins at Vss 150 200 pF Ci(«) Clock-3 input capacitance V BB _ _5 r f = 1MHz, unmeasured pins at Vss 100 150 pF c i((M) Clock-4 input capacitance V BB = _5: f = 1MHz, unmeasured pins at Vss 100 150 pF C DB Data bus capacitance V BB = -5 ' f = 1MHz - unmeasured pins at Vss 15 25 pF Co Output capacitance (any output except data bus) V BB. _5_ f = 1MHz, unmeasured pins at Vgs 10 15 pF 1 All typical values are at T^ = 25°C and nominal voltages. "D.
Pages: 0
Publisher: Harbin Institute of Technology Press (January 1, 2000)
ISBN: 7560301789
Numerical Methods for DSP Systems in C
Higher education Twelfth Five-Year Plan materials and electronic information science and engineering majors planning materials : Digital Signal Processing(Chinese Edition)
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